Hardware and C++ Engineer

Berkeley Lab has an opening for a Hardware and C++ Engineer in the Computational Research Division. This position will contribute to a number of projects.  This includes 

1. developing custom hardware accelerators for traditional CMOS technologies 
2. novel technologies with different computational models
3. Developing software to simulate novel hardware or to develop applications and representative kernels that may execute on emerging extreme heterogeneous hardware 

As an Engineer, you will support starting and existing projects by programming in hardware description languages such as Verilog. This includes evaluating CMOS circuits based on a collection of metrics for a chosen set of applications. The successful candidate will require knowledge of hardware design using a Hardware Description Language and strong knowledge of software programming languages such as C++ and python.

What You Will Do:

• Perform hardware design in both CMOS ASIC and FPGA from small circuits such as logic primitives to larger computational accelerators using Verilog (or another HDL) or SPICE.
• Perform comparisons between different circuits using different input sets and collection of metrics.
• Be familiar with hardware CAD tools and behavioral evaluation/modelling tools in order to extend existing tool flows and to extend the capability of these CAD and behavioral modelling tools with new design libraries.
• Develop test benches and input sets in order to compare different accelerators for key HPC applications.
• Develop software as needed to either model hardware circuits or to write applications that will execute in novel hardware.

What is Required:

• Bachelor’s degree and a minimum of 2 years of related experience in a Computing Science or Computer Engineering related scientific discipline; or an equivalent combination of education and work experience.
• Experience in C++ development.
• Experience in Verilog (or equivalent HDL) and hardware design in CMOS.
• Experience with the use of script languages and system utilities such as configure, Perl, UNIX shell scripts, and “make.”
• Proven record of working effectively in a team, seeing projects through to completion, meeting deadlines, interacting with users, and thorough documentation of contributions.
• Willingness to learn and develop skills in new topics.

Desired Qualifications:

• Experience in circuit-level design using SPICE.
• Experience in hardware CAD tools for FPGAs.
• Familiarity with testing and evaluating of new hardware blocks.
• Experience in hardware ASIC CAD tools such as from Synopsys and Cadence.
• Familiarity or experience with industry-standard benchmark programs and methods.
• Developer level experience in architectural simulator code development.
• Knowledge of parallel applications and programming would be a bonus.
• Experience using performance analysis tools (e.g., hardware performance counters and code instrumentation frameworks like PAPI or HPC Toolkit) would be beneficial to understand the performance of complex scientific applications involved in the study.

Notes:

• This is a full-time2 year, term appointment with the possibility of extension or conversion to Career appointment based upon satisfactory job performance, continuing availability of funds and ongoing operational needs.
• This position will be hired at a level commensurate with the business needs and the skills, knowledge, and abilities of the successful candidate.
• This position may be subject to a background check. Any convictions will be evaluated to determine if they directly relate to the responsibilities and requirements of the position. Having a conviction history will not automatically disqualify an applicant from being considered for employment.
• Work will be primarily performed at Lawrence Berkeley National Lab, 1 Cyclotron Road, Berkeley, CA.

Equal Employment Opportunity: Berkeley Lab is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, age, or protected veteran status. Berkeley Lab is in compliance with the Pay Transparency Nondiscrimination Provision under 41 CFR 60-1.4.  Click here to view the poster and supplement: "Equal Employment Opportunity is the Law."